SoC device test system
Chroma Ate Europe
* 512 digital I/O pins
* 16/32 MW vector memory
* 16/32 MW pattern instruction memory
* Multi-site testing up to 32 sites
* Per-pin test architecture
* Up to 8 16-bit ADDA channels option
* Up to 2Gbit X 8 CH scan depth option
* ALPG option for memory test
* Up to 32 high-voltage pins
* 32 high-performance DPS channels
* Overall timing accuracy < ±550ps
* 8 ~ 32-CH / board for VI-45 analog option
* 2 ~ 8-CH / board for PVI-100 analog option
* MicrosoftWindows® XP OS
* C++ and GUI programming interface
* CRISP full suite of intuitive software tools
* Test template for test program creation
* Test program and pattern converters for other platforms
* Accept DIB and probe card of other testers directly
* Support STDF data output
* Air-cooled, small footprint tester-in-a-test-head design
-
zoom
