Telemetry mezzanine board
EDT
Each input is processed with a tunable quadrature down-converter. The resulting baseband I and Q signals are low-pass filtered and digitized with 12-bit precision at programmable sample rates up to 65 MHz.
The resulting four channels of digital sample data are available as inputs to the Xilinx Spartan 3 FPGA, which is programmable to perform signal processing or to serve as a configurable switch matrix to route data to the main board and up to two 4-channel digital down-converter Graychips (GC4016).
For details on system requirements and EDT-provided software driver packages, see specifications for your EDT main board (PCI SS, PCI GS, or PCIe8 LX).








