High-speed synchronous SRAM memory
Integrated Silicon Solution
static RAM designed to provide a burstable, high-performance
memory for high speed networking and communication
applications. The IS61LP6432A is organized as 64K
words by 32 bits and the IS61LP6436A is organized as 64K
words by 36 bits. Fabricated with ISSI's advanced CMOS
technology, the device integrates a 2-bit burst counter, highspeed
SRAM core, and high-drive capability outputs into a
single monolithic circuit. All synchronous inputs pass
through registers controlled by a positive-edge-triggered
single clock input.
Write cycles are internally self-timed and are initiated by
the rising edge of the clock input. Write cycles can be from
one to four bytes wide as controlled by the write control
inputs.
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