Power management controller
Lattice Semiconductor

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  CPLD, FPGA and mixed-signal design software
  

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  Clock generator
  8 - 400 MHz | ispClock5600A
  
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  Clock generator
  8 - 267 MHz | ispClock5300S
  
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  Clock generator
  50 - 400 MHz | ispClock5400D
  

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  Cross-point switch
  

Power management

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  Field programmable gate array (FPGA)
  
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  Complex / simple programmable logic device (CPLD, SPLD)
  
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  Programmable system-on-chip (SoC)
  
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  Field programmable gate array (FPGA)
  17K - 149K LUTs | LatticeECP3
  
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  Field programmable gate array (FPGA)
  6K - 68K LUTs | LatticeECP2/M
  
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  Field programmable gate array (FPGA)
  1.5K - 32.8K LUTs | LatticeECP & EC
  
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  Field programmable gate array (FPGA)
  5K - 40K LUTs | LatticeXP2
  
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  Complex / simple programmable logic device (CPLD, SPLD)
  256 - 6864 LUTs, 60, 150 MHz | MachXO2
  
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  Complex / simple programmable logic device (CPLD, SPLD)
  400 MHz | ispMACH 4000