LVDS receiver
Pericom Semiconductor
differential line receivers that use low-voltage differential
signaling (LVDS) to support data rates in excess of
400 Mbps. These products are designed for applications
requiring high-speed, low-power consumption
and low noise generation.
A differential input signal (350mV) is translated by the
device to 3V CMOS output level. Exclusive to the
PI90LV032A quad receiver is a power-down mode that
Three-states the outputs and places the device in a lowpower
idle state (40mW typical).
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