Multi-chip package (MCP)
Silicon Storage Technology

The SST34HF1641J ComboMemory integrates either a 1M x16 or 2M x8 CMOS flash memory bank with either a 256K x16, or 512K x16 CMOS pseudo SRAM (PSRAM) memory bank in a multi-chip package (MCP). This device is fabricated using SST proprietary, high-performance CMOS SuperFlash technology incorporating the split-gate cell design and thick-oxide tunneling injector to attain better reliability and manufacturability compared with alternate approaches. The SST34HF1641J is ideal for applications such as cellular phones, GPS devices, PDAs, and other portable electronic devices in a low power and small form factor system.

The SST34HF1641J features dual flash memory bank architecture allowing for concurrent operations between the two flash memory banks and the PSRAM. The device can read data from either bank while an Erase or Program operation is in progress in the opposite bank. The two flash memory banks are partitioned into 12 Mbit and 4 Mbit with bottom sector protection options for storing boot code, program code, configuration/parameter data and user data.