Time switch
Vitesse Semiconductor
Key Features
* Provides hitless automatic reconfiguration of TSI mapping
* Support for split frame domain (two domains per device)
* Overhead ports can drop and add overhead bytes for automatic protection switching and in-band messaging
* Monitors cross-connect program memory integrity
* Detects loss of signal (LOS) and checks input parity; inserts output parity, scrambling, and descrambling
* Transparent mode enables switching between ports at 2.488 Gbps independent of protocol
* Integrated automatic protection switching (APS) provides high reliability and eliminates external hardware expense (except VSC9295)
High-Capacity TSIs
* Industry's highest capacity single device with up to 340 Gbps
* Support for STS-1 grooming
* Allows standardization on one hardware and software platform to optimize development resources
* Compatibility with 622M I/O backplanes, port cards, and ASICs







