24-bit ADC with integrated AFE
Fast and flexible output rate: 2.5 SPS to 125 kSPS
Channel scan data rate of 24,845 SPS per channel (40.25 μs settling)
85 dB common mode rejection of 50 Hz and 60 Hz at 20 SPS per channel
±10 V inputs, either 8 differential or 16 single-ended
VIN pin absolute maximum rating ±65 V
Absolute input pin voltage up to ±20 V
Minimum 1 MΩ impedance
On-chip 2.5 V reference
±0.12% initial accuracy at 25°C, ±5 ppm/°C (typical) drift
Internal or external clock
AVDD = 4.5 V to 5.5 V
IOVDD = 2 V to 5.5 V
Total current consumption AVDD + IOVDD (IDD) = 10.4 mA
Temperature range: −40°C to +105°C
3-wire or 4-wire serial digital interface (Schmitt trigger on SCLK)
SPI, QSPI, MICROWIRE, and DSP compatible
The AD4115 is a low power, low noise, 24-bit, sigma-delta (Σ-Δ) analog-to-digital converter (ADC) that integrates an analog front end (AFE) for eight fully differential or 16 single-ended, high impedance (≥1 MΩ), bipolar, ±10 V voltage inputs.
The AD4115 integrates key analog and digital signal conditioning blocks to configure eight individual setups for each analog input channel in use. The AD4115 features a maximum channel scan rate of 24,845 kSPS (40.25 µs) for fully settled data.
The embedded 2.5 V, low drift (±5 ppm/°C), band gap internal reference (with output reference buffer) reduces the external component count.
The digital filter allows flexible settings, including simultaneous 50 Hz and 60 Hz rejection at a 27.27 SPS output data rate. The user can select different filter settings depending on the requirements of each channel in the application.