Aging test system Hatina WLBI
thermalperformanceaccelerated aging

Aging test system - Hatina WLBI - Cosmic Equipment S.p.A. - thermal / performance / accelerated aging
Aging test system - Hatina WLBI - Cosmic Equipment S.p.A. - thermal / performance / accelerated aging
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Aging test system - Hatina WLBI - Cosmic Equipment S.p.A. - thermal / performance / accelerated aging - image - 4
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Characteristics

Test type
aging, thermal, performance, accelerated aging
Domain
laboratory, for the electronics industry, for research and development
Applications
for semiconductors, for GaN FET
Configuration
compact
Other characteristics
precision, multichannel, high-voltage

Description

Product overview
The Hatina WLBI is a wafer-level Burn-In (WLBI) and HTOL solution engineered for power devices on wafers. The compact test chamber (nominal footprint 560×560×550 mm; spec sheet D×W×H 560×560×560 mm) connects to standard wafer probers to enable full-wafer burn-in with high parallel throughput. Heaters are embedded at each DUT to provide precise, low-power local thermal control (ovenless approach), reducing energy use and footprint while simplifying automation integration.

Key benefits
  • Supports power technologies: Si, SiC and GaN
  • Compatible with 6-, 8- and 12-inch wafers
  • Enables full-wafer burn-in and accelerated reliability tests
  • High parallel throughput for cost-effective lifecycle testing
  • Integrates with standard wafer prober platforms

Features / Functional capabilities
  • Compact wafer-level Burn-In chamber designed to interface with standard wafer probers
  • High parallel throughput: up to 1,600 test sites concurrently
  • Per-site electrical limits: up to 1.2 kV and 2 mA
  • Supports functional burn-in, HTGB and HTRB test setups
  • Embedded distributed heaters at each DUT for precise, low-power thermal control (ovenless)
  • Cleanroom-compatible design and automation-ready integration

Parameter / variant notes
  • Func_Test: Yes
  • HTGB: Yes
  • HTRB: Yes
  • BVDSs: possible (future uIDE software revision)
  • IDSx: possible (future uIDE software revision)
  • Vth: possible (future uIDE software revision)
  • Up to 1600 die testing in a single wafer touchdown (3 end-points per site)

Technical specifications
  • Number of test sites: Up to 1600
  • Dimensions (D × W × H): 560 mm × 560 mm × 560 mm (spec sheet); compact chamber overview: 560×560×550 mm
  • Drain High Voltage Power Supply: -50 V to 1.2 kV
  • Gate Voltage Power Supply: -50 V to +50 V
  • Current during Functional test: 2 mA
  • Current during HTRB test: 2 mA
  • Current during HTGB test: 2 mA
  • Supported test types: functional burn-in, HTGB, HTRB, WLBI (full-wafer)
  • Wafer compatibility: 6-, 8- and 12-inch wafers

Exhibitions

Meet this supplier at the following exhibition(s):

PCIM Expo & Conference
PCIM Expo & Conference

9-11 Jun 2026 Nuremberg (Germany)

  • More information
    Semicon
    Semicon

    10-13 Nov 2026 Munich (Germany)

  • More information
    *Prices are pre-tax. They exclude delivery charges and customs duties and do not include additional charges for installation or activation options. Prices are indicative only and may vary by country, with changes to the cost of raw materials and exchange rates.