Margin tester TMT4

Industry’s first dedicated Transmit/Receive (Tx/Rx) lane margining tool, the Tektronix TMT4 allows you to easily assess the link health of your PCIe® generation 3 and 4 designs in minutes, not days. Acting as an active link partner with the device under test (DUT), the instrument can control presets via protocol and quickly display eye diagrams with their associated link training parameters, providing insights into potential design flaws on a lane-by-lane or preset-by-preset basis. Fast, Easy PCIe Lane Margining The TMT4 Margin Tester complements existing Bit Error Rate Tester (BERT) and oscilloscope solutions for margin testing. Unlike BERT and oscilloscope systems, the TMT4 Margin Tester’s simple setup, configuration, and user interface minimizes the need for senior engineers to ensure systems are set up properly for testing, and enables a broader team of users to quickly assess the health of the link formed between Margin Tester and their DUT. Its targeted Tx/Rx capability allows you to capture issues with PCIe Gen 3 and Gen 4 communications on both ends of the link and enables teams to evaluate the link health of up to x16 Gen 4 links, across all PCIe presets 0-9, in minutes. Simple Setup, Fast Results Control the TMT4 Margin Tester using the front panel, a web browser, or the Rest API. Two scan options are available: Quick Scan and Custom Scan. Both include DUT Tx and DUT Rx tests. In Quick Scan, the Margin Tester and the DUT undergo a natural link negotiation to determine which presets to communicate over. Custom Scan is intended to provide users with more parameters to adjust for specific tests by forcing the DUT into specific presets for test.