Jitter attenuator ZL30253

The ZL30253 is a flexible, high-performance, clock multiplier/jitter attenuator IC. From any input clock frequency 1kHz to 1250MHz the ZL30252 can produce frequency-locked output frequencies from 1Hz to 1035MHz and as many as 3 differential or 6 CMOS output clock signals. Output jitter is typically 0.16 to 0.28ps RMS (12kHz to 20MHz). Automatic self-configuration from internal EEPROM allows clock signals to be available immediately after power-up or reset. Product Features Three Input Clocks Two Differential/CMOS inputs One single-ended/CMOS input Any input frequency from 1kHz to 1250MHz (1kHz to 300MHz for CMOS) Inputs continually monitored for activity and frequency accuracy Automatic or manual reference switching Low-Bandwidth DPLL Programmable bandwidth, 14Hz to 500Hz Attenuates jitter up to several UI Freerun or digital hold on loss of all inputs Digitally controlled phase adjust Low-Jitter Fractional-N APLL and 3 Outputs Any Output Frequency from <1Hz to 1035MHz High-resolution fractional frequency conversion with 0ppm error Easy-to-configure, encapsulated design requires no external VCXO or loop filter components Each output has independent dividers Output Jitter Typically 0.16 to 0.28ps RMS (12kHz to 20MHz integration band) Outputs are CML or 2xCMOS, can interface to LVDS, LVPECL, HSTL, SSTL and HCSL In 2xCMOS mode, the P and N pins can be different frequencies (e.g. 125MHz and 25MHz) Per-output supply pin with CMOS output voltages from 1.5V to 3.3V Precise output alignment circuitry and per-output phase adjustment Per-output enable/disable and glitchless start/stop (stop high or low)