OverviewMSPM0G3507 is a member of the MSPM0 family: an ultra‑low‑power, highly integrated 32‑bit MCU based on the Arm® Cortex®‑M0+ core running up to 80 MHz. It targets industrial and embedded applications requiring precise analog acquisition, mixed‑signal control and advanced communications (including CAN‑FD). The device supports extended temperature range (‑40 °C to 125 °C) and a 1.62 V–3.6 V supply.
Parameters (summary)- CPU: Arm Cortex‑M0+
- Max frequency: 80 MHz
- Flash: 128 KB (ECC)
- SRAM: 32 KB (hardware parity option)
- ADC: 2× 12‑bit SAR simultaneous sampling, 4 Msps (11/16/17 channels, model dependent)
- DAC: 12‑bit, 1 Msps
- GPIOs: package dependent (24 / 28 / 44 / 60)
- Comms: CAN‑FD, I2C ×2, SPI ×2, UART ×4
- Security: AES (128/256), TRNG, CRC, cryptographic accelerators
- Operating range: −40 °C to 125 °C, 1.62 V–3.6 V
Key features- Arm Cortex‑M0+ CPU with Memory Protection Unit and deterministic performance up to 80 MHz.
- Embedded flash with ECC (128 KB) and up to 32 KB SRAM with hardware parity option.
- Two simultaneous 12‑bit 4‑Msps ADCs with hardware averaging (14‑bit effective at 250 ksps) and up to 17 external channels.
- One 12‑bit 1‑Msps DAC with integrated output buffer.
- Two zero‑drift chopper op amps (0.5 µV/°C drift) with programmable gain up to 32× and one general‑purpose amplifier.
- Three high‑speed comparators with 8‑bit reference DACs and fast propagation in high‑speed mode.
- Programmable analog routing between ADC, OPAs, GPAMP, COMP and DAC; internal selectable VREF (1.4 V / 2.5 V) and integrated temperature sensor.
- Optimized low‑power modes: RUN, SLEEP, STOP, STANDBY, SHUTDOWN with measured currents for system design.
- Intelligent digital peripherals: 7‑channel DMA, math accelerator (DIV, SQRT, MAC, TRIG), multiple timers supporting up to 22 PWM outputs, windowed watchdogs and RTC.
- Enhanced communications: CAN‑FD, high‑speed SPI (up to 32 Mbit/s), FM+ I2C (1 Mbit/s), UARTs with LIN/IrDA/DALI/Smart Card support.
- Data integrity & security: CRC‑16/CRC‑32, TRNG, AES acceleration and secure debug features.
- Development support: 2‑pin SWD debug, MSPM0 SDK and LaunchPad evaluation kit.
Analog & measurement capabilities- Dual simultaneous 12‑bit 4‑Msps ADCs with hardware averaging and up to 17 channels for multi‑sensor acquisition.
- Integrated programmable analog routing for flexible signal chain design (ADC ↔ OPA ↔ COMP ↔ DAC).
- Two zero‑drift OPAs for precision amplification and one GPAMP for general instrumentation tasks.
- One 12‑bit DAC with buffer for actuation, calibration or offset generation.
Package options- 64‑pin LQFP (PM)
- 48‑pin LQFP (PT)
- 48‑pin VQFN (RGZ)
- 32‑pin VQFN (RHB)
- 28‑pin VSSOP (DGS)
Family members- MSPM0G3505: 32 KB Flash, 16 KB RAM
- MSPM0G3506: 64 KB Flash, 32 KB RAM
- MSPM0G3507: 128 KB Flash, 32 KB RAM
Development kits & tool support- LP‑MSPM0G3507 LaunchPad evaluation kit for prototyping and validation.
- MSPM0 SDK, reference designs, example code, technical manuals and RTOS support (FreeRTOS, Zephyr).
Technical specifications- Core: Arm Cortex‑M0+ with MPU
- Max CPU frequency: 80 MHz
- Flash: 128 KB (ECC)
- SRAM: 32 KB (parity option)
- ADC: 2×12‑bit SAR, 4 Msps, simultaneous sampling
- DAC: 12‑bit, 1 Msps
- Op amps: 2 zero‑drift chopper OPAs, 1 GPAMP
- Comparators: 3 high‑speed with 8‑bit reference DACs
- DMA: 7‑channel
- Timers: multiple, up to 22 PWM outputs
- Communication interfaces: CAN‑FD, I2C ×2, SPI ×2, UART ×4
- Security: AES 128/256, TRNG, CRC
- Operating temperature: −40 °C to 125 °C
- Supply voltage: 1.62 V to 3.6 V