Product SummarySY75707 is a differential-input to two LVCMOS outputs translator with ultra-low additive jitter and extended temperature range. It accepts VDDIN 1.8 V to 3.3 V and translates to VDDO 1.2 V to 1.8 V. Packaged in an ultra-small 8-pin VDFN (1.4 mm × 1.6 mm), it integrates 50-Ohm series resistance on LVCMOS outputs for direct driving of 50 Ω transmission lines.
Key Features- Differential HCSL / LVPECL / LVDS input
- Two LVCMOS outputs with integrated 50 Ω series resistance
- Voltage translation: VDDIN 1.8–3.3 V → VDDO 1.2–1.8 V
- Ultra-low additive jitter: 32 fs typical (12 kHz–20 MHz band at 156.25 MHz)
- Typical propagation delay: 1.2 ns
- Maximum output frequency (fMAX): 250 MHz
- Available in ultra-small 8-pin VDFN (1.4 mm × 1.6 mm)
Parametrics / TableInput: HCSL / LVPECL / LVDS
Output Frequency (Max) (GHz): 0.25
Max Propagation Delay (ps): 2300
OE: Yes
Output: LVCMOS
Supply Voltage (VDDIN): 1.8 V to 3.3 V
Output Voltage (VDDO): 1.2 V to 1.8 V
DescriptionSY75707 is intended to translate differential clock or data signals to single‑ended LVCMOS while minimizing additive jitter and preserving small form factor, low power and low cost. Built-in 50 Ω series resistance enables direct driving of standard transmission lines without external series components.
Typical Applications- Differential clock to single-ended LVCMOS translation
- High-performance clock distribution in tight form-factor systems
- High-speed communication receivers and transmitters requiring ultra-low additive jitter
Technical Specifications- Additive jitter: 32 fs typical (12 kHz–20 MHz at 156.25 MHz)
- Propagation delay: ~1.2 ns typical
- Maximum output frequency (fMAX): 250 MHz
- Supported inputs: HCSL, LVPECL, LVDS
- Outputs: Two LVCMOS with integrated 50 Ω series resistance
- Input supply (VDDIN): 1.8 V to 3.3 V
- Output supply (VDDO): 1.2 V to 1.8 V
- Package: Ultra-small 8-pin VDFN (1.4 mm × 1.6 mm)
- Operating temperature: extended industrial range (see datasheet)