Standard logic gate 1.65 - 5.5 V | 74LVC06A

The 74LVC06A provides six independent open-drain inverter buffers. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down. The outputs can be connected to implement active-low wired-OR or active-high wired-AND functions. Features and Benefits Wide Supply Voltage Range from 1.65V to 5.5V Sinks 24mA at VCC = 3.3V CMOS low power consumption IOFF Supports Partial-Power-Down Mode Operation Inputs or outputs accept up to 5.5V Inputs can be driven by 3.3V or 5.5V allowing for voltage translation applications. ESD Protection Exceeds JESD 22 o 200-V Machine Model (A115-A) o 2000-V Human Body Model (A114-A) o Exceeds 1000-V Charged Device Model (C101C) Latch-Up Exceeds 250mA per JESD 78, Class II Range of Package Options SO-14 and TSSOP-14 Available in Green Molding Compound (no Br, Sb) Lead Free Finish/ RoHS Compliant