Bus interface microchip ADS1256

convertersensor signal conditionerprogrammable

Overview
The ADS1255 and ADS1256 are low-noise, 24-bit analog-to-digital converters delivering high-resolution measurement capability for demanding industrial and instrumentation applications. The devices combine a 4th-order delta-sigma (ΔΣ) modulator with a programmable digital filter. A flexible input multiplexer supports differential or single-ended signals and includes sensor-detect circuitry. A selectable input buffer increases input impedance while a low-noise programmable gain amplifier (PGA) provides gains from 1 to 64 in binary steps. The programmable filter lets users trade resolution (up to 23 bits noise-free) for throughput (up to 30 kSPS). Fast channel cycling and one-shot single-cycle settling modes enable efficient multiplexed measurements. Communication uses an SPI-compatible serial interface (2-wire operation possible). On-chip calibration supports self and system correction of offset and gain. Bidirectional digital I/Os and a programmable clock output are provided for system integration.

Key features

• 24-bit resolution, no missing codes
• Up to 23 bits noise-free resolution (selected settings)
• ±0.0010% maximum nonlinearity
• Data rates up to 30 kSPS
• Fast channel cycling
  • Example: 18.6 bits noise-free (21.3 effective bits) at 1.45 kHz
• One-shot conversions with single-cycle settling
• Flexible input multiplexer with sensor detect
  • Four differential inputs (ADS1256 only)
  • Eight single-ended inputs (ADS1256 only)
• Chopper-stabilized input buffer (selectable)
• Low-noise PGA: 27 nV input-referred noise
• On-chip self and system calibration for all PGA settings
• 5 V-tolerant SPI-compatible serial interface
• Analog supply: 5 V; Digital supply: 1.8 V to 3.6 V
• Low power dissipation
  • As low as 38 mW in normal mode
  • 0.4 mW in standby mode

Package
ADS1256: SSOP-28 (DB) — 28 pins; package area ~79.56 mm² (10.2 x 7.8 mm). ADS1255: SSOP-20.

Technical description
The architecture is a 4th-order ΔΣ modulator followed by a programmable digital filter. Input options include differential and single-ended signals; the selectable input buffer and PGA (gain 1 to 64) raise input impedance and improve SNR. The programmable filter allows optimization between noise-free resolution (up to 23 bits) and data rate (up to 30 kSPS). Fast multiplexed-channel scanning and one-shot single-cycle-settling conversions are supported. The SPI-compatible serial interface can operate in 2-wire mode. On-chip calibration corrects offset and gain across all PGA settings. General-purpose bidirectional digital I/Os and a programmable clock output facilitate integration with data acquisition systems.

Technical specifications

• Resolution: 24 bits
• Maximum sample rate: 30 kSPS
• Number of input channels: 8 (ADS1256)
• Interface type: SPI (5 V tolerant)
• Architecture: Delta-Sigma (ΔΣ)
• Input type: Differential, Single-ended
• Multichannel configuration: Multiplexed
• Reference mode: External
• Input voltage range: 0 V to 5.25 V
• Analog supply voltage: 4.75 V to 5.25 V
• Digital supply voltage: 1.8 V to 3.6 V
• Features: 50/60 Hz rejection, GPIO, PGA, sensor detect
• Operating temperature range: -40 °C to 85 °C
• Typical power consumption: 36 mW
• PGA input-referred noise: 27 nV
• Maximum nonlinearity: ±0.0010%
• Package: SSOP-28 (ADS1256), SSOP-20 (ADS1255)