Multi-access network controller netX 500

multi-functionmulti-protocol4 ports

Overview The netX 500 is a highly integrated network controller with a system architecture optimized for communication and maximum data throughput. It is designed as a flexible high-end network controller or highly integrated single-chip solution for application and communication and can be used as master or slave including a display controller.

Highlights

• Flexible high-end network controller or highly integrated single-chip solution for application and communication
• Four communication channels separately configurable as Real-Time Ethernet interface or fieldbus interface
• 32-bit/200 MHz ARM 926 CPU with ≈200 MIPS for controller and device standards
• Dual-port memory, ADC and integrated graphic/display controller on chip

Details The netX is based on an ARM 926EJ-S 32-bit CPU at 200 MHz with MMU, caches, DSP and Java extensions. It integrates 144 KByte internal RAM and 32 KByte ROM containing the boot loader; operating systems like Windows CE and Linux use external SDRAM, SRAM or FLASH. Host connection is via a Dual-Port Memory interface which can also act as a 16-bit extension bus for stand-alone applications. Extensive peripheral functions (UART, USB, SPI, I2C) and an integrated graphic controller are provided. A central data switch connects ARM CPU, communication, graphic and host controllers to memory and peripheral units via five data paths enabling parallel data transfer.

Communication channels and controllers The netX provides four identical communication channels with a two-level controller structure: dedicated ALUs and protocol logic implemented via microcode. Two channels include an integrated Ethernet PHY. The Medium Access Controller (xMAC) handles encoding/decoding and bus access; the Protocol Execution Controller (xPEC) assembles data into packets and controls telegram traffic. Data exchange uses DMA block-by-block with ARM memory; each channel also offers dual-port memory for status information or local process data. The communication ALUs support various protocols and protocol combinations and enable synchronization independent of CPU reaction time.

Supported protocols

• Sercos Master
• PROFINET IO-Controller
• EtherNet/IP Scanner
• EtherCAT Master
• DeviceNet Master
• CANopen Master
• PROFIBUS DP Master
• CC-Link IE Field Basic Slave
• VARAN Client
• Sercos Slave
• PROFINET IO-Device
• PROFIBUS DP Slave
• POWERLINK Controlled Node
• Open Modbus/TCP Server
• Open Modbus/TCP Client
• EtherNet/IP Adapter
• EtherCAT Slave
• DeviceNet Slave
• CC-Link Slave
• CANopen Slave

Order information Product name | Part number | Brief description
NETX 500 | 2210.000 | Network controller for fieldbus and Real-Time Ethernet (master and slave) with display controller

Characteristics / Technical specifications

• CPU: ARM 926EJ-S 32-bit, 200 MHz (≈200 MIPS)
• Internal memory: 144 KByte RAM; 32 KByte ROM (boot loader)
• External memory support: SDRAM, SRAM, FLASH for OS (Windows CE, Linux)
• Host interface: Dual-Port Memory interface (configurable as 16-bit extension bus)
• Communication: Four configurable channels (each with dedicated ALUs and microcode-based protocol logic); two channels with integrated Ethernet PHY
• Data path: Central data switch connecting controllers to memory/peripherals via five data paths enabling parallel transfers
• Controllers: xMAC (Medium Access Controller) and xPEC (Protocol Execution Controller)
• Data transfer: DMA block-by-block exchange; dual-port memory per channel for status/process data
• Peripherals: UART, USB, SPI, I2C, ADC, integrated graphic/display controller
• Use cases: High-end network controller, single-chip application & communication solution, master or slave for fieldbus and real-time Ethernet